Krishna Saraswat

Krishna Saraswat is a professor in Stanford Department of Electrical Engineering in the United States. He is an ISI Highly Cited Researcher in engineering,[1] placing him in the top 250 worldwide in engineering research, and a recipient of IEEE's Andrew S. Grove Award for "seminal contributions to silicon process technology".[2][3]

Krishna Saraswat
Born (1947-07-03) July 3, 1947
Alma materStanford University (Ph.D.)
BITS Pilani (B.E.)
Awards2000 Thomas D. Callinan Award
2004 IEEE Andrew S. Grove Award
Scientific career
FieldsElectrical Engineering, nanophotonics, photonic crystals, solar cells
InstitutionsStanford University
Doctoral advisorJames D. Meindl

Education and positions

Saraswat received his B.E. degree in electronics in 1968 from Birla Institute of Technology and Science, Pilani (BITS) and his M.S. (1968) and Ph.D. (1974) in electrical engineering from Stanford University. Saraswat stayed at Stanford as a researcher and was appointed professor of electrical engineering in 1983. He also has an honorary appointment of an adjunct professor at the Birla Institute of Technology and Science, Pilani, India, since January 2004 and a visiting professor during the summer of 2007 at IIT Bombay, India. He is Stanford's Rickey/Nielsen Professor in the School of Engineering, and courtesy professor of materials science and engineering.

Career

Saraswat has worked on modeling of CVD of silicon, conduction in polysilicon, diffusion in silicides, contact resistance, interconnect delay, and oxidation effects in silicon. He pioneered the technologies for aluminum/titanium layered interconnects, which became an industry standard,[4] as well as CVD of MOS gates with alternative materials such as tungsten, WSi2, and SiGe.

Saraswat worked on microwave transistors in graduate school, and his thesis was on high voltage MOS devices and circuits. During the late 1980s he focused on single wafer manufacturing and developed equipment and simulators for it. Jointly with Texas Instruments a microfactory for single wafer manufacturing was demonstrated in 1993.[5] Since the mid 1990s, Saraswat has worked on technology for scaling MOS technology to sub-10 nm regime and pioneered several new concepts of 3-D ICs with multiple layers of heterogeneous devices. His present research focuses on new materials, particularly SiGe, germanium, and III-V compounds, to replace silicon as nanoelectronics scales further.[6]

As of July 2019, Krishna Saraswat has been granted approximately 15 patents.[7]

Awards and honors

References
  1. "Engineering - Research Analytics - Thomson Reuters". Researchanalytics.thomsonreuters.com. 2013-03-31. Retrieved 2013-04-30.
  2. "Andrew S. Grove Award". IEEE. Retrieved 2013-04-30.
  3. "Prof. Krishna Saraswat, Presenter Bios". IEEE. Retrieved 2019-10-08.
  4. "Krishna Saraswat - GHN: IEEE Global History Network". Ieeeghn.org. 1947-07-03. Retrieved 2013-04-30.
  5. "Saraswat Group Stanford University". Retrieved 2019-10-08.
  6. "CV of Prof. Krishna Saraswat". Stanford Profiles. Retrieved 2019-10-08.
  7. "Patents.Justia.com Krishna Saraswat". Retrieved 2019-10-08.
  8. "SIA University Research Award". 22 January 2018. Retrieved 2019-10-08.
  9. "BITS Pilani Distinguished Alumni Award 2012". Retrieved 2019-10-08.
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