RAM limit

Microcontroller devices with integrated I/O and memory on-chip sometimes had no, or a small, address bus available for external devices. For example, a microcontroller family available with a 2 kilobyte address space might have a variant that brought out an 11 line address bus for an external ROM; this could be done by reassigning I/O pins as address bus pins. Some general-purpose processors with integrated ROM split a 16-bit address space between internal ROM and an external 15-bit memory bus.

Some microprocessors had fewer than 16 address pins: for example, the MOS Technology 6507 (a reduced pin count version of the 6502) was used in the Atari 2600 and was limited to a 13-line address bus.

Most 8-bit general-purpose microprocessors have 16-bit address spaces and generate 16 address lines. Examples include the Intel 8080, Intel 8085, Zilog Z80, Motorola 6800, Microchip PIC18, and many others. These processors have 8-bit CPUs with 8-bit data and 16-bit addressing. The memory on these CPUs is addressable at the byte level. This leads to a memory addressable limit of 2¹⁶ × 1 byte = 65,536 bytes or 64 kilobytes.

The Intel 8086 and derivatives, such as the 8088, 80186 and 80188 form the basis of the popular x86 platform and are the first level of the IA16 architecture. These were 16-bit CPUs with 20-bit addressing. The memory on these CPUs were addressable at the byte level. These processors could address 2²⁰ bytes (1 megabyte).

The Intel 80286 CPU used a 24-bit addressing scheme. Each memory location was byte-addressable. This results in a total addressable space of 2²⁴ × 1 byte = 16,777,216 bytes or 16 megabytes. The 286 and later could also function in real mode, which imposed the addressing limits of the 8086 processor. The 286 had support for virtual memory.

The Intel 80386SX was an economical version of the 386DX. It had a 24-bit addressing scheme, in contrast to 32-bit in the 386DX. Like the 286, the 386SX can address only up to 16 megabytes of memory.

The Motorola 68000 had a 24-bit address space, allowing it to access up to 16 megabytes of memory.

The 386DX had 32-bit addressing, allowing it to address up to 4 gigabytes (4096 megabytes) of memory.

The Motorola 68020, released in 1984, had a 32-bit address space, giving it a maximum addressable memory limit of 4 GB. All following chips in the Motorola 68000 series inherited this limit.

The Pentium Pro and all Pentium 4s have 36-bit addressing, which resulted in total addressable space of 64 gigabytes, but it requires that the operating system support Physical Address Extension.

Modern 64-bit processors such as designs from ARM, Intel or AMD are typically limited to supporting fewer than 64 bits for RAM addresses. They commonly implement from 40 to 52 physical address bits[1][2][3][4] (supporting from 1 TB to 4 PB of RAM). Like previous architectures described here, some of these are designed to support higher limits of RAM addressing as technology improves. In both Intel64 and AMD64, the 52-bit physical address limit is defined in the architecture specifications (4 PB).

The first major operating system for microcomputers was CP/M. This operating system was compatible with Altair 8800-like microcomputers, made by Gary Kildall in conjunction with the programming language PL/M, and was licensed to computer manufacturers by Kildall's company Digital Research after it was rejected by Intel. The Intel 8080 used by these computers was an 8-bit processor, with 16-bit address space, which allowed it access up to 64 KB of memory; .COM executables used with CP/M have a maximum size of 64 KB due to this, as do those used by DOS operating systems for 16-bit microprocessors.

In the original IBM PC, the basic RAM limit is 640 KB. This is to allow for hardware addressing space in the upper 384 KB (upper memory area (UMA)) of the total addressable memory space of 1024 KB (1 MB). Ways to overcome the 640k barrier, as it came to be known, involved using special addressing modes available in the 286 and later x86 processors. The 1 MB total address space was a result of the 20-bit address space limit imposed on the 8088 CPU.

Using the color video buffer space, some third-party utilities could add memory at the top of the 640k conventional memory area, to extend memory up to the base address used by hardware adapters. This could ultimately backfill RAM up to the MDA base address.

Hardware extensions allowed access to more memory than the 8086 CPU could address through paging memory. This memory was known as expanded memory. An industry de facto standard was developed by the LIM consortium, composed of Lotus, Intel and Microsoft. This standard was the Expanded Memory Specification (EMS). Pages of memory from expanded memory hardware were accessible through an addressing window placed into a free area in the UMA space, and by exchanging it for other pages when needed to access other memory. EMS supported 16 MB of space.

Using a quirk in the 286 CPU architecture, the high memory area (HMA) was accessible, as the first 64 KB above the 1 MB limit of 20-bit addressing in the x86 architecture.

Using the 24-bit memory addressing capabilities of the 286 CPU architecture, a total address space of 16 MB was accessible. Memory above the 1 MB limit was called extended memory. However the area between 640 KB and 1 MB was reserved for hardware addressing in IBM PC compatibles. DOS and other real mode programs, limited to 20-bit addresses, could only access this space through EMS emulation on the extended memory, or an EMS analog for extended memory. Microsoft developed a standard known as the Extended Memory Specification (XMS). Accessing the memory above the HMA required usage of the protected mode of the 286 CPU.

With the development of the i386 CPU architecture, the address space was moved to 32-bit addressing, and a limit of 4 GB. With this CPU, access to 16 MB memory areas was available to DOS programs that used DOS extenders, such as DOS/4GW, MiniGW/16, MiniGW, and others. Initially a de facto industry memory standard for interaction known as VCPI was developed. Later, a Microsoft standard supplanted this, known as the DPMI. These standards allowed direct access to the 16 MB space, instead of the paging scheme used by EMS and XMS.

16-bit OS/2 was limited to 15 MB, due to reserve space designed into the operating system. It reserved the top 1 MB of the 16 MB 24-bit address space for non-memory (from 16 MB to 15 MB).

In non-PAE modes of 32-bit x86 processors, the usable RAM may be limited to less than 4 GB. Limits on memory and address space vary by platform and operating system. Limits on physical memory for 32-bit platforms also depend on the presence and use of Physical Address Extension (PAE), which allows 32-bit systems to use more than 4 GB of physical memory.

PAE and 64-bit systems may be able to address up to the full address space of the x86 processor.