Threading Building Blocks

A oneTBB program creates, synchronizes, and destroys graphs of dependent tasks according to algorithms, i.e. high-level parallel programming paradigms (a.k.a. Algorithmic Skeletons). Tasks are then executed respecting graph dependencies. This approach groups TBB in a family of techniques for parallel programming aiming to decouple the programming from the particulars of the underlying machine.

oneTBB implements work stealing to balance a parallel workload across available processing cores in order to increase core utilization and therefore scaling. Initially, the workload is evenly divided among the available processor cores. If one core completes its work while other cores still have a significant amount of work in their queue, oneTBB reassigns some of the work from one of the busy cores to the idle core. This dynamic capability decouples the programmer from the machine, allowing applications written using the library to scale to utilize the available processing cores with no changes to the source code or the executable program file. In a 2008 assessment of the work stealing implementation in TBB, researchers from Princeton University found that it was suboptimal for large numbers of processors cores, causing up to 47% of computing time spent in scheduling overhead when running certain benchmarks on a 32-core system.[3]

oneTBB, like the STL (and the part of the C++ standard library based on it), uses templates extensively. This has the advantage of low-overhead polymorphism, since templates are a compile-time construct which modern C++ compilers can largely optimize away.

oneTBB is available commercially as a binary distribution with support,[4] and as open-source software in both source and binary forms.

oneTBB does not provide guarantees of determinism or freedom from data races.[5]

oneTBB is a collection of components for parallel programming:

• Basic algorithms: parallel_for, parallel_reduce, parallel_scan
• Advanced algorithms: parallel_pipeline, parallel_sort
• Containers: concurrent_queue, concurrent_priority_queue, concurrent_vector, concurrent_hash_map, concurrent_unordered_map, concurrent_unordered_set, concurrent_map, concurrent_set
• Memory allocation: scalable_malloc, scalable_free, scalable_realloc, scalable_calloc, scalable_allocator, cache_aligned_allocator
• Mutual exclusion: mutex, spin_mutex, queuing_mutex, spin_rw_mutex, queuing_rw_mutex, recursive_mutex
• Timing: portable fine grained global time stamp
• Task scheduler: direct access to control the creation and activation of tasks

• Intel oneAPI Base Toolkit
• Intel Integrated Performance Primitives (IPP)
• Intel oneAPI Data Analytics Library (oneDAL)
• Intel oneAPI Math Kernel Library (oneMKL)
• Intel Advisor
• Intel Inspector
• Intel VTune Profiler
• Intel Concurrent Collections (CnC)
• Algorithmic skeleton
• Parallel computing
• List of C++ multi-threading libraries
• List of C++ template libraries
• Parallel Patterns Library
• Grand Central Dispatch (GCD)
• Software Architecture Building Blocks

• Voss, Michael; Asenjo, Rafael; Reinders, James (2019), Pro TBB, Apress, doi:10.1007/978-1-4842-4398-5, ISBN 978-1-4842-4397-8, S2CID 195847637
• Reinders, James (July 2007), Intel Threading Building Blocks: Outfitting C++ for Multi-core Processor Parallelism (Paperback ed.), Sebastopol: O'Reilly Media, ISBN 978-0-596-51480-8
• Voss, M. (October 2006), Demystify Scalable Parallelism with Intel Threading Building Blocks' Generic Parallel Algorithms, archived from the original on 2012-02-05, retrieved 2007-06-06
• Voss, M. (December 2006), Enable Safe, Scalable Parallelism with Intel Threading Building Blocks' Concurrent Containers, archived from the original on 2012-02-05, retrieved 2007-06-06
• Hudson, Richard L.; Saha, Bratin; Adl-Tabatabai, Ali-Reza; Hertzberg, Benjamin C. (2006), "McRT-Malloc", Proceedings of the 2006 international symposium on Memory management - ISMM '06, pp. 74–83, doi:10.1145/1133956.1133967, ISBN 978-1595932211, S2CID 9120368

• oneTBB Industry Specification
• oneTBB on GitHub
• Official website at Intel