Switched capacitor

By definition, the charge ${\displaystyle q}$ on any capacitor ${\displaystyle C}$ with a voltage ${\displaystyle V}$ between its plates is:

${\displaystyle q=CV.\ }$

Therefore, when S₁ is closed while S₂ is open, the charge stored in the capacitor ${\displaystyle C_{S}}$ will be:

${\displaystyle q_{\text{in}}=C_{S}V_{\text{in}}}$

assuming ${\displaystyle V_{\text{in}}}$ is an ideal voltage source.

When S₂ is closed (S₁ is open - they are never both closed at the same time), some of that charge is transferred out of the capacitor. Exactly how much charge gets transferred can't be determined without knowing what load is attached to the output. However, by definition, the charge remaining on capacitor ${\displaystyle C_{S}}$ can be expressed in terms of the unknown variable ${\displaystyle V_{\text{out}}}$:

${\displaystyle q_{\text{out}}=C_{S}V_{\text{out}}.\ }$

Thus, the charge transferred from in to out during one switching cycle is:

${\displaystyle q_{\text{in-out}}=q_{\text{in}}-q_{\text{out}}=C_{S}(V_{\text{in}}-V_{\text{out}}).\ }$

This charge is transferred at a rate of ${\displaystyle f}$. So the average electric current (rate of transfer of charge per unit time) from in to out is:

${\displaystyle I_{\text{in-out}}=q_{\text{in-out}}f=C_{S}(V_{\text{in}}-V_{\text{out}})f.\ }$

The voltage difference from in to out can be written as:

${\displaystyle V_{\text{in-out}}=V_{\text{in}}-V_{\text{out}}.\ }$

Finally, the current–voltage relationship from in to out can be expressed with the same form as Ohm's law, to show that this switched-capacitor circuit simulates a resistor with an equivalent resistance of:

${\displaystyle R_{\text{equivalent}}={V_{\text{in-out}} \over I_{\text{in-out}}}={(V_{\text{in}}-V_{\text{out}}) \over C_{S}(V_{\text{in}}-V_{\text{out}})f}={1 \over {C_{S}f}}.\ }$

This circuit is called a parallel resistor simulation because in and out are connected in parallel and not directly coupled. Other types of SC simulated resistor circuits are bilinear resistor simulation, series resistor simulation, series-parallel resistor simulation, and parasitic-insensitive resistor simulation.

Charge is transferred from in to out as discrete pulses, not continuously. This transfer approximates the equivalent continuous transfer of charge of a resistor when the switching frequency is sufficiently higher (≥100x) than the bandlimit of the input signal.

The SC circuit modeled here using ideal switches with zero resistance does not suffer from the ohmic heating energy loss of a regular resistor, and so ideally could be called a loss free resistor. However real switches have some small resistance in their channel or p–n junctions, so power is still dissipated.

Because the resistance inside electric switches is typically much smaller than the resistances in circuits relying on regular resistors, SC circuits can have substantially lower Johnson–Nyquist noise. However harmonics of the switching frequency may be manifested as high frequency noise that may need to be attenuated with a low-pass filter.

SC simulated resistors also have the benefit that their equivalent resistance can be adjusted by changing the switching frequency (i.e., it is a programmable resistance) with a resolution limited by the resolution of the switching period. Thus online or runtime adjustment can be done by controlling the oscillation of the switches (e.g. using an configurable clock output signal from a microcontroller).

SC simulated resistors are used as a replacement for real resistors in integrated circuits because it is easier to fabricate reliably with a wide range of values and can take up much less silicon area.

This same circuit can be used in discrete time systems (such as ADCs) as a sample and hold circuit. During the appropriate clock phase, the capacitor samples the analog voltage through switch S₁ and in the second phase presents this held sampled value through switch S₂ to an electronic circuit for processing.

Electronic filters consisting of resistors and capacitors can have their resistors replaced with equivalent switched-capacitor simulated resistors, allowing the filter to be manufactured using only switches and capacitors without relying on real resistors.

Denote by ${\displaystyle T=1/f}$ the switching period. In capacitors,

${\displaystyle {\text{charge}}={\text{capacitance}}\times {\text{voltage}}}$

Then, when S₁ opens and S₂ closes (they are never both closed at the same time), we have the following:

1) Because ${\displaystyle C_{s}}$ has just charged:

${\displaystyle Q_{s}(t)=C_{s}\cdot V_{s}(t)\,}$

2) Because the feedback cap, ${\displaystyle C_{fb}}$, is suddenly charged with that much charge (by the op amp, which seeks a virtual short circuit between its inputs):

${\displaystyle Q_{fb}(t)=Q_{s}(t-T)+Q_{fb}(t-T)\,}$

Now dividing 2) by ${\displaystyle C_{fb}}$:

${\displaystyle V_{fb}(t)={\frac {Q_{s}(t-T)}{C_{fb}}}+V_{fb}(t-T)\,}$

And inserting 1):

${\displaystyle V_{fb}(t)={\frac {C_{s}}{C_{fb}}}\cdot V_{s}(t-T)+V_{fb}(t-T)\,}$

This last equation represents what is going on in ${\displaystyle C_{fb}}$ - it increases (or decreases) its voltage each cycle according to the charge that is being "pumped" from ${\displaystyle C_{s}}$ (due to the op-amp).

However, there is a more elegant way to formulate this fact if ${\displaystyle T}$ is very short. Let us introduce ${\displaystyle dt\leftarrow T}$ and ${\displaystyle dV_{fb}\leftarrow V_{fb}(t)-V_{fb}(t-dt)}$ and rewrite the last equation divided by dt:

${\displaystyle {\frac {dV_{fb}(t)}{dt}}=f{\frac {C_{s}}{C_{fb}}}\cdot V_{s}(t)\,}$

Therefore, the op-amp output voltage takes the form:

${\displaystyle V_{\text{out}}(t)=-V_{fb}(t)=-{\frac {1}{{\frac {1}{fC_{s}}}C_{fb}}}\int V_{s}(t)dt\,}$

This is the same formula as the op amp inverting integrator where the resistance is replaced by a SC simulated resistor with an equivalent resistance of:

${\displaystyle R_{\text{equivalent}}={1 \over {C_{s}f}}.\ }$

This switched-capacitor circuit is called "parasitic-sensitive" because its behavior is significantly affected by parasitic capacitances, which will cause errors when parasitic capacitances can't be controlled. "Parasitic insensitive" circuits try to overcome this.

The delaying parasitic insensitive integrator has a wide use in discrete time electronic circuits such as biquad filters, anti-alias structures, and delta-sigma data converters. This circuit implements the following z-domain function:

${\displaystyle H(z)={\frac {1}{z-1}}}$