Cadence Design Systems

Cadence Design Systems, Inc. (stylized as cādence), headquartered in San Jose, California,[2] is an American multinational computational software company, founded in 1988 by the merger of SDA Systems and ECAD, Inc. The company produces software, hardware, and silicon structures for designing integrated circuits, systems on chips (SoCs), and printed circuit boards.[3]

Cadence Design Systems, Inc.
TypePublic company
IndustryComputer Software
Founded1988 (1988)
HeadquartersSan Jose, California, U.S.
Key people
Anirudh Devgan
(President & CEO)
Lip-Bu Tan
(Executive Chairman)
RevenueIncrease US$3.56 billion (2022)
Increase US$1.07 billion (2022)
Increase US$849 million (2022)
Total assetsIncrease US$5.14 billion (2022)
Total equityIncrease US$2.75 billion (2022)
Number of employees
10,200 (Dec 2022)
Websitewww.cadence.com
Footnotes / references
[1]

History

Cadence Design Systems began as an electronic design automation (EDA) company, formed by the 1988 merger of Solomon Design Automation (SDA), co-founded in 1983 by Richard Newton, Alberto Sangiovanni-Vincentelli, and James Solomon, and ECAD, a public company co-founded by Ping Chao, Glen Antle, and Paul Huang in 1982. SDA's CEO Joseph Costello was appointed as CEO of the newly combined company.[4]

Following the resignation of Cadence's original CEO Joe Costello in 1997, Jack Harding was appointed CEO.[5] Ray Bingham was named CEO in 1999.[6] In 2004, Mike Fister became Cadence's new CEO.[7]

In 2008, Cadence's board appointed Lip-Bu Tan as acting CEO, after the resignation of Mike Fister; Tan had served on the Cadence board of directors since 2004.[8] In January 2009, the board of directors of Cadence voted unanimously to confirm Lip-Bu Tan as president and CEO. Tan had been most recently CEO of Walden International, a venture capital firm, where he remains chairman of the firm.[9]

In April 2021, following a Washington Post report on the use of Cadence and Synopsys technology in the People's Liberation Army's military-civil fusion efforts,[10] U.S. legislators Michael McCaul and Tom Cotton requested that the United States Department of Commerce tighten controls on the sales of semiconductor manufacturing software.[11][12]

On December 15, 2021, Anirudh Devgan assumed the role of president & CEO, and Lip-Bu Tan became executive chairman. Devgan joined Cadence in 2012 and was appointed president in 2017.[13]

Products

The company develops software, hardware and intellectual property (IP) used to design chips,[14] systems and printed circuit boards.[15] Cadence also supplies IP covering interfaces, memory, analog, SoC peripherals, and data plane processing units, and develops chip verification technologies including simulators and formal verification tools.

Custom IC technologies

  • Virtuoso Platform. Tools for designing full-custom integrated circuits;[16] includes schematic entry, behavioral modeling (Verilog-AMS), circuit simulation, custom layout, physical verification, extraction, and back-annotation. Used mainly for analog, mixed-signal, RF, and standard-cell designs, but also memory and FPGA designs.
  • Spectre X. In June 2019, Cadence introduced Spectre X parallel circuit simulator, so that users could distribute time- and frequency-domain simulations across hundreds of CPUs for faster runtime and speed.[17]
  • AWR is a radio frequency to millimeter wave design environment for designing 5G/wireless products. Used for communications, aerospace and defense, semiconductor, computer, and consumer electronics.[18][19]

Digital implementation and signoff technologies

  • Genus, Innovus, Tempus & Voltus. In March 2020, Cadence announced that its Innovus place and route engine and optimizer were now integrated into Genus Synthesis, with both tools using a common user interface and database.[20]
  • Stratus High-level synthesis tool that creates RTL implementations from C, C++, or SystemC code.[21]
  • Cerebrus. In July 2021, Cadence announced its machine learning-based Cerebrus chip explorer product to automatically optimize the Cadence digital design flow for specified power, performance, and area goals across multiple blocks. Cerebrus utilizes a reinforcement learning approach to increase efficiency each time the optimization process is repeated.[22][23]

Other Cadence RTL to GDS II tools: Conformal Equivalence Checker, Stratus High-Level Synthesis, Joules Power Analysis, Quantus RC Extraction, Modus AutomaticTest Pattern Generation.

Verification technologies

  • Xcelium. Xcelium is a parallel simulator, introduced in 2017, based on a multi-core parallel computing architecture.[24]
  • JasperGold. JasperGold is a formal verification tool, initially introduced in 2003.[25] In 2019, Cadence announced new machine learning technology to automate JasperGold solver selection and parameterization to achieve faster first-time proofs; additionally to optimize regression runs.[26]
  • Perspec System Verifier. Perspec was announced in 2014, for defining and verifying system-level verification scenarios, and then creating test cases to verify the scenarios using constraint-solving technology.[27] In mid-2018, Cadence announced that Perspec supported the new Accellera Portable Test and Stimulus Standard (PSS) standard.[28]
  • vManager. vManager is verification management tool for tracking verification process, including coverage, using emulation, simulation, and/or formal technology as the data source(s).[29][30]
  • Palladium. In 2015, Cadence announced the Palladium Z1 Hardware emulation platform,[31] with over 100 million gates per hour compile speed, and greater than 1 MHz execution for billion-gate designs.[32] Cadence's Palladium emulator was originally from Cadence's Quickturn acquisition in 1998.[33] In 2021, Cadence announced Palladium Z2, claiming a 1.5X performance and 2X capacity improvement over the prior Palladium Z1, for more than 18 billion gate+ capacity. Additionally, Cadence claimed Palladium Z2 could compile 10 billion gates in under 10 hours.[34][35]
  • Protium. The Protium FPGA prototyping platform was officially introduced in 2014.[36] In 2017, Cadence introduced the Protium S1 built on Xilinx Virtex UltraScale FPGAs.[37] In 2019, Protium X1 rack-based prototyping was introduced,[38] which Cadence claimed supported a 1.2 billion gate SoCs at around 5 MHz.[39] Palladium S1/X1 and Protium share a single compilation flow.[40] In 2021, Protium X2 was announced; Cadence claimed a 1.5X performance and 2X capacity improvement over Protium X1, and that Protium X2 could compile 10 billion gates in under 24 hours.[41][42]

Intellectual property

Chip design IP targeting areas including memory/storage/high-performance interface protocols (USB or PCIe controllers and PHYs), Tensilica DSP processors for audio, vision, wireless modems, and convolutional neural nets. Tensilica DSP processors IP[43] include:

Tensilica Vision DSPs for Imaging, Vision, and AI processing;[44][45] Tensilica HiFi DSPs for Audio/Voice/Speech processing;[46][47] Tensilica Fusion DSPs for IoT;[48] Tensilica ConnX DSPs for Radar, Lidar, and Communications processing;[49][50] and Tensilica DNA Processor Family for AI acceleration[51][52]

In 2021, Cadence launched the Tensilica AI Platform to accelerate AI SoC development and improve power, performance, and area—targeting mobile, IoT, automotive, intelligent sensor, and industrial AI SoC designs.[53]

PCB and packaging technologies

System analysis

  • Sigrity. Tools for signal, power integrity, and thermal integrity analysis and IC package design.[57]
  • Clarity. Cadence introduced Clarity in April 2019, as part of its expansion into system analysis. Clarity is a 3D field solver for electromagnetic analysis, that uses distributed adaptive meshing to partition jobs across on hundreds of cores for gains in speed and capacity.[58]
  • Celsius. In September 2019, Cadence announced Celsius, a parallel architecture thermal solver that uses finite element analysis for solid structures and computational fluid dynamics (CFD) for fluids.[59]
  • Fidelity. Fidelity, formerly known as OMNIS, is a computational fluid dynamics, mesh generation, multi-physics simulation, and optimization product, with established applications in aerospace, automotive, industrial, and marine. (From NUMECA acquisition in 2021.)[60]
  • Fidelity Fine Turbo. Turbomachinery CFD vertical, formerly known as FINE/Turbo. (From NUMECA acquisition in 2021.)
  • Fidelity Fine Marine. Marine CFD vertical, formerly known as FINE/Marine. (From NUMECA acquisition in 2021.)
  • Fidelity Fine Open. General CFD package, largely succeeded by Fidelity, formerly known as FINE/Open. (From NUMECA acquisition in 2021.)
  • Fidelity Pointwise. Computational fluid dynamics (CFD) mesh generation. (From Pointwise acquisition in 2021.)[61]
  • Cascade Technologies, Inc. Hi-fidelity CFD solvers for multiphysics analysis of turbulence fluid flows.[62]

Recognition

In 2016, Cadence CEO Lip-Bu Tan was awarded the Dr. Morris Chang Exemplary Leadership Award by the Global Semiconductor Alliance.[63]

In 2019, Investor's Business Daily ranked Cadence Design Systems #5 on its 50 Best Environmental, Social, and Governance (ESG) Companies list.[64]

In 2020, Fortune Magazine named Cadence to Fortune's "100 Best Companies to Work For list" for the sixth consecutive year.[65]

Also in 2020, Cadence was ranked #45 in PEOPLE magazine's Companies that Care.[66]

Sponsorship

In May 2022, McLaren announced a multi-year partnership deal with Cadence.[67]

Acquisitions

Timeline

Year
announ-
ced
Company Business Value (USD) Refe-
rences
1989 Gateway Design Automation Simulation software $72 million [68]
1990 Automated Systems, Inc. PCB Design Automation $23 million [69]
1991 Valid Logic Gate-level design $198 million [70][71]
1993 Comdisco Systems Digital signal processing & communications design $13 million [72]
1997 Cooper & Chyan Technology + UniCAD Placement and routing (Specctra AutoRouter) and UniCAD (PCB Design) $422 million [73][74][75]
1998 Bell Labs Design Automation Simulation and verification software $45 million [76]
1998 Quickturn Design Systems Emulation hardware $253 million [77]
1999 OrCAD Systems PCB & FPGA design $121 million [78]
2002 IBM's DFT tools & group Design-for-Test not disclosed [79]
2003 Celestry Design Dense modeling, full-chip circuit simulation not disclosed [80]
2003 Verplex Formal verification, equivalence checkers not disclosed [81]
2004 Neolinear Analog & mixed-signal layout, circuit sizing not disclosed [82]
2005 Verisity Verification automation, hardware acceleration $315 million [83]
2006 Praesagus Manufacturing variation predication $26 million [84]
2007 Invarium Lithography-modeling and pattern-synthesis not disclosed [85]
2007 Clear Shape Design for Manufacturing not disclosed [86][87]
2008 Chip Estimate IP portal, IP reuse management not disclosed [88]
2010 Denali Software Memory models, design IP, verification IP $315 million [89]
2011 Altos Design Automation Foundation IP characterization, such as memory, standard cell libraries not disclosed [90][91]
2011 Azuro Clock concurrent optimization not disclosed [92]
2012 Sigrity Signal, power & thermal integrity analysis, IC package design $80 million [93][57]
2013 Cosmic Circuits Analog & mixed-signal IP for mobile device IP, such as USB, MIPI, audio & Wi-Fi cores not disclosed [94][95]
2013 Tensilica Dataplane processing IP $380 million [96][97]
2013 Evatronix Semiconductor IP: USB, MIPI, display, & storage interfaces not disclosed [98]
2014 Forte Design Systems High-level synthesis not disclosed [99][100]
2014 Jasper Design Automation Formal analysis & verification $170 million [101][102]
2016 Rocketick Technologies Multi-core parallel simulator not disclosed [103]
2017 nusemi High-speed Serializer/Deserializer (SerDes) communications IP not disclosed [104]
2019 AWR Corporation Wireless/high-frequency radio-frequency application design software $160 million [105]
2020 Integrand Software Method of moments solver technology for analysis & extraction for simulating large IC and packages, characterization, and analysis in 3D-IC systems not disclosed [106][107]
2020 InspectAR Augmented Interfaces Maps electronics & labels circuit board schematics in real-time using augmented reality not disclosed [108][109]
2021 NUMECA CFD, mesh generation, multi-physics simulation & optimization not disclosed [60]
2021 Pointwise Computational fluid dynamics (CFD) mesh generation not disclosed [61]
2022 Future Facilities Computational Fluid Dynamics (CFD) solution provider for electronics cooling and energy performance optimization solutions for data center design and operations not disclosed [110]
2022 OpenEye Scientific Computational molecular modeling and simulation software used by pharmaceutical and biotechnology companies for drug discovery $500 million [111]
2023 Rambus Completion of acquisition of SerDes and memory interface PHY IP business from Rambus Inc. not disclosed [112]
2023 Intrinsix Corporation Semiconductor design services provider not disclosed [113]

The company has also acquired High-Level Design (HLD), UniCAD, CadMOS, Ambit Design Systems, Simplex, Silicon Perspective, Plato, and Get2Chip.

Lawsuits

  • Avanti Corporation From 1995 until 2002, Cadence was involved in a 6-year-long legal dispute[116] with Avanti Corporation (brand name "Avant!"), in which Cadence claimed Avanti stole Cadence code, and Avanti denied it. According to Business Week "The Avanti case is probably the most dramatic tale of white-collar crime in the history of Silicon Valley".[116] The Avanti executives eventually pleaded no contest and Cadence received several hundred million dollars in restitution. Avanti was then purchased by Synopsys, which paid $265 million more to settle the remaining claims.[117] The case resulted in a number of legal precedents.[118]
  • Aptix Corporation Quickturn Design Systems, a company acquired by Cadence, was involved in a series of legal events with Aptix Corporation. Aptix licensed a patent to Mentor Graphics and the two companies jointly sued Quickturn over an alleged patent infringement. Amr Mohsen, CEO of Aptix, forged and tampered with legal evidence and was subsequently charged with conspiracy, perjury, and obstruction of justice. Mohsen was arrested after violating his bail agreement by attempting to flee the country. While in jail, Mohsen plotted to intimidate witnesses and kill the federal judge presiding over his case.[119] Mohsen was further charged with attempting to delay a federal trial by feigning incompetency.[120][121] Due to the overwhelming misconduct, the judge ruled the lawsuit as unenforceable and Mohsen was sentenced to 17 years in prison.[122] Mentor Graphics subsequently sued Aptix to recoup legal costs. Cadence also sued Mentor Graphics and Aptix to recover legal costs.[123]
  • Berkeley Design Automation In 2013, Cadence sued Berkeley Design Automation (BDA) for circumvention of a license scheme to link its Analog FastSpice (AFS) simulator to Cadence's Analog Design Environment (Virtuoso ADE).[124] The lawsuit was settled less than one year later with an undisclosed payment of BDA and a multi-year agreement to support interoperability of AFS with ADE through Cadence's official interface. BDA was bought by Mentor Graphics a few months later.[125]

Notable persons

See also

References

  1. "Cadence Design Systems, Inc. 2022 Annual Report". U.S. Securities and Exchange Commission. 13 February 2023.
  2. Investor's Business Daily CEO Lip-Bu Tan Molds Troubled Cadence Into Long-Term Leader Retrieved November 12, 2020
  3. The Street How Cadence Designs the Future Retrieved July 21, 2020
  4. NYTimes A Fun Chief at Cadence Is Serious Merger Man Retrieved October 4, 1991
  5. WSJ Cadence's Costello Steps Down As CEO to Join Software Firm Retrieved October 21, 1997
  6. EETimes Harding replaced as Cadence president Retrieved April 27, 1999
  7. WSJ Intel's Michael Fister Resigns To Take Top Job at Cadence Retrieved May 13, 2004
  8. IConnect007 Cadence CEO Mike Fister Resigns Retrieved October 15, 2008
  9. EETimes Lip-Bu Tan named Cadence CEO Retrieved January 8, 2009
  10. Nakashima, Ellen; Shih, Gerry (April 9, 2021). "China builds advanced weapons systems using American chip technology". The Washington Post. ISSN 0190-8286. Retrieved 2023-04-02.
  11. "McCaul, Cotton Ask Administration to Restrict Sale of Chip-Making Software to China". United States House Committee on Foreign Affairs. April 15, 2021. Retrieved 2023-04-02.
  12. De Chant, Tim (April 16, 2021). "Congressmen ask Biden admin to keep chip design software away from China". Ars Technica. Retrieved April 2, 2023.
  13. Guru Focus Cadence Announces Anirudh Devgan to Become CEO in December 2021 Retrieved July 26, 2021
  14. Design on Diagonal Path in Pursuit of a Faster Chip, John Markoff, The New York Times, February 26, 2007
  15. NYTimes Cadence Acquires Software Company Retrieved April 11, 1990
  16. "Course description from University of Colorado". Archived from the original on 2007-06-24. Retrieved 2007-06-10.
  17. New Electronics Cadence looks to boost simulation performance with the Spectre X Simulator Retrieved June 3, 2019
  18. Chin, Spencer (December 5, 2019). "Cadence acquires AWR from NI to bolster 5G presence" Fierce Electronics Retrieved September 6, 2021
  19. Levitsky, Allison (December 2, 2019). "Cadence Design Systems to acquire AWR Corp. from National Instruments for $160M" Silicon Valley Business Journal Retrieved September 6, 2021
  20. EENews Europe Cadence's digital full flow promises up to 3X faster throughput, better results Retrieved March 17, 2020
  21. Morris, Kevin Powers AI Revolution EEJournal Retrieved Mar 31, 2020
  22. Takahashi, Dean (August 18, 2021). "Cadence Design Systems launches Cerebrus machine learning for chip design" Venture Beat Retrieved September 5, 2021
  23. Deutshcer, Maria (July 22, 2021). "Chip design giant Cadence launches AI platform to speed processor development" Silicon Angle Retrieved September 5, 2021
  24. EET Asia Multi-core parallel engine powers Cadence simulator Retrieved March 1, 2017.
  25. EETimes Startup promises 'pure' formal tool for verification Retrieved May 19, 2003
  26. eeNews Europe Formal verification platform leverages AI to speed up verification throughput Retrieved May 9, 2019
  27. Electronics Weekly Chip verification moves to system-level Retrieved December 11, 2014
  28. Electronics Weekly EDA embraces standard to streamline IC test and verification Retrieved July 6, 2018
  29. Tech Design Forum Cadence uses SQL to boost verification manager capacity Retrieved February 24, 2014
  30. Oct 6, 2003 has tool for SoC design project management Electronics Weekly Retrieved Oct 30, 2021
  31. EE Journal State of Emulation Retrieved June 6, 2016
  32. Electronic Specifier Enterprise Emulation Platform Develops Supercomputer Retrieved October 26, 2016
  33. NY Times Cadence to Acquire Quickturn Design Retrieved 36137
  34. Neowin Cadence's latest Palladium and Protium "dynamic duo" to offer 2X capacity and 1.5X gains Retrieved Apr 5, 2021
  35. EENews Europe Cadence boosts its emulation and verification systems Retrieved Apr 5, 2021
  36. EDN Cadence unveils Protium FPGA-based SoC prototyping platform Retrieved July 14, 2014
  37. EET Asia Multi-core parallel engine powers Cadence simulator Retrieved March 1, 2017
  38. Tech Design Forum Cadence Expands Protium for Rack-Based Prototyping Retrieved May 28, 2019
  39. Electronics Weekly Cadence machine can prototype a 1bn gate SoC on FPGAs Retrieved May 29, 2019
  40. EE Journal Cadence EDA Update Retrieved May 8, 2017
  41. Embedded Cadence speeds billion gate SoC verification Retrieved Apr 7, 2021
  42. New Electronics Cadence unveils next-generation Palladium Z2 and Protium X2 systems Retrieved Apr 6, 2021
  43. "Tensilica Customizable Processor and DSP IP". ip.cadence.com. Retrieved 2019-05-16.
  44. AnandTech Cadence Announces Tensilica Q7 DSP Retrieved May 15, 2029
  45. Embedded Cadence: Tensilica Vision Q7 DSP IP doubles vision and AI performance for automotive, AR/VR mobile Retrieved May 16, 2019
  46. eeNews Embedded Cadence Tensilica HiFi 5 DSP for audio and voice processing Retrieved November 1, 2018
  47. EE Journal Watching AI Evolve Retrieved November 12, 2018
  48. Engineering.com Cadence Announces Availability of Tensilica Xtensa LX7 Processor Architecture Retrieved September 30, 2016
  49. Embedded Computing Design Cadence's Tensilica ConnX B20 DSP IP Boosts Performance for Automotive Radar/Lidar and 5G Retrieved March 8, 2019
  50. Electronics Weekly Cadence ups DSP throughput for 5G comms, and automotive radar and lidar Retrieved March 7, 2019
  51. AnandTech Cadence Announces The Tensilica DNA 100 IP: Bigger Artificial Intelligence Retrieved September 19, 2018
  52. Electronic Design Cadence's Deep-Neural-Network Processor Pushes to 3.4 TMACs/W Retrieved September 26, 2018
  53. HelpNet Security Cadence Tensilica AI Platform accelerates intelligent SoC development Retrieved Sep 15, 2021
  54. "UNIX Software and CAD tools". Carleton University. Archived from the original on 2012-05-03. Retrieved 2007-06-10.
  55. Schilling, Andreas (May 2, 2018). approach: TSMC stacks several wafers on top of each other Hardware LuxxRetrieved May 2, 2018
  56. Kirkwood, Isabelle Newfoundland's InspectAR Acquired By Cadence Design Systems BetaKit Retrieved Aug 13, 2020
  57. EE Times Cadence Pays $80 million to buy signal integrity firm Retrieved July 3, 2012
  58. McGrath, Dylan (2 April 2019). "Cadence Eyes System Analysis Market". EE Times.
  59. EE News Embedded Complete Electrical-thermal co-simulation for system analysis Retrieved September 19, 2019
  60. eeNews Europe Cadence buys Belgian CFD specialist Retrieved Jan 21, 2021
  61. eeNews OneSpin deal leads flurry of EDA acquisitions: Page 2 of 3 Retrieved Apr 15, 2021
  62. Cascade CFD Blog
  63. GSA Website Dr. Morris Chang Exemplary Leadership Award Winner Retrieved November 28, 2020
  64. "50 Best ESG Companies: A List Of Today's Top Stocks For Environmental, Social And Governance Values". Investor's Business Daily. 2 December 2019.
  65. "Cadence". Fortune. Retrieved 2020-04-28.
  66. Great Place to Work PEOPLE Companies that Care 2020 Retrieved November 28, 2020
  67. "McLaren Racing - McLaren Racing and Cadence announce new multi-year partnership". www.mclaren.com. Retrieved 2022-11-18.
  68. NY Times Cadence to Buy Gateway Design Retrieved January 20, 2005
  69. NY Times Cadence Acquires Software Company Retrieved April 11, 1990
  70. UPI Cadence Design, Valid Logic Retrieved October 2, 1991
  71. SemiEngineering Valid Logic Systems Retrieved November 29, 2020
  72. Funding Universe Cadence Design Systems History Retrieved January 20, 2005
  73. Cadence to Buy Cooper & Chyan Retrieved October 29, 1996
  74. Wall Street Journal Cadence Design Systems Agrees To Purchase Cooper & Chyan Retrieved October 29, 1996
  75. "Cadence Acquires CCT and UniCAD". edn.com. EDN. 1996-11-21. Retrieved 8 December 2022.
  76. "Cadence 'Formally' Acquires BLDA – Cadence Design Systems buys Bell Labs Design Automation from Lucent Technologies". Electronic News. 1998. Retrieved 20 August 2021.
  77. "Cadence to Acquire Quickturn Design". The New York Times. 10 December 1998. Retrieved 3 April 2015.
  78. "Update: Cadence gets lift from Orcad purchase". EETimes.
  79. EE Times Cadence buys IBM's design-for-test tools business Retrieved October 1, 2002
  80. EDN Cadence Acquires Celestry Retrieved January 16, 2003
  81. Santarini, Michael (July 14, 2003). "Cadence buys formal tool vendor Verplex". EE Times. Retrieved December 21, 2017.
  82. "Cadence acquires analog layout vendor Neolinear". EE Times. April 6, 2004.
  83. EE Times Cadence completes acquisition of Verisity Retrieved April 7, 2005
  84. "Cadence bought DFM startup Praesagus for $26 million".
  85. Electronic Design Cadence Acquires Invarium To Beef Up DFM Technology Retrieved July 22, 2007
  86. "Cadence Design Systems buys chip design co., Clear Shape | VentureBeat". venturebeat.com. 17 August 2007. Retrieved 2017-12-20.
  87. EDN Cadence to acquire Clear Shape Retrieved January 20, 2005
  88. Leopold, George (March 21, 2008). "Cadence buys IP reuse specialist Chip Estimate". EE Times. Retrieved December 20, 2017.
  89. EDN Cadence to buy Denali for $315 million Retrieved May 13, 2010
  90. EE Times Cadence Buys Altos Design Automation Retrieved May 10, 2011
  91. Silicon Valley Business Journal Cadence acquires Altos Design Automation Retrieved May 10, 2011
  92. EE Times Cadence acquires power specialist Azuro Retrieved July 12, 2011
  93. Evertiq Cadence acquires Sigrity Retrieved July 3, 2012
  94. EE News Europe Cosmic Circuits Acquisition helps Cadence to expand IP Portfolio Retrieved February 7, 2013
  95. EE Times Cadence buys analog IP startup Retrieved February 7, 2013
  96. EETimes Cadence to acquire Tensilica Retrieved March 11, 2013
  97. VentureBeat Cadence buys chip design firm Tensilica for $380m Retrieved March 11, 2013
  98. EE Times Cadence buying Evatronix to boost IP pool Retrieved May 7, 2013
  99. New Electronics Cadence Buys Forte, Looks to build HLS offering Retrieved February 6, 2014
  100. Electronics 360 The Math Backs Cadence's Forte Acquisition Retrieved February 6, 2014
  101. eeNews Embedded Cadence Grows formal verification profile with Jasper DA buyout Retrieved April 23, 2014
  102. Electronics 360 Cadence Keeps Consolidating with Jasper Purchase Retrieved April 22, 2014
  103. EENews Analog Cadence acquires parallel logic simulation speed-up tech with Rocketick purchase Retrieved April 13, 2016
  104. eeNews Analog Cadence grows high-speed communications IP offering with nusemi dea Retrieved November 2, 2017
  105. Silicon Valley Business Journal Cadence Design Systems to acquire AWR Corp. from National Instruments for $160M Retrieved December 2, 2019
  106. New Electronics Cadence makes Integrand acquisition Retrieved February 17, 2020
  107. everythingRF Cadence Accelerates Innovation in 5G RF Communications by Acquiring Integrand Retrieved February 14, 2020
  108. CBC A new chapter: Silicon Valley firm buys St. John's tech company Retrieved August 13, 2020
  109. Betakit Newfoundland's InspectAR Acquired by Cadence Design Systems Retrieved August 13, 2020
  110. Cadence News Releases Cadence completes acquisition of Future Facilities Retrieved July 26, 2022
  111. Vitu, Teya (August 23, 2022). "Silicon Valley firm seeks to acquire Santa Fe's OpenEye Scientific". The Santa Fe New Mexican.
  112. "Cadence completes acquisition of PHY IP assets from Rambus - News". Silicon Semiconductor. Retrieved 2023-09-17.
  113. "Cadence to Acquire Intrinsix Corporation from CEVA". www.prnewswire.com. Retrieved 2023-09-21.
  114. Specialized Software Maker Is Said to Be in Buyout Talks, Andrew Ross Sorkin and Michael J. de la Merced, The New York Times, Published: June 4, 2007
  115. "Cadence Withdraws Proposal to Acquire Mentor Graphics".
  116. Business Week (pay wall) overview of the entire case, after the criminal trial but before the purchase by Synopsys.
  117. EEDesign article about the final settlement.
  118. Cadence v. Avanti: The UTSA and California Trade Secret Law Archived 2012-07-07 at archive.today, Danley, J., Berkeley Technology Law Journal, 2004, Vol 19; Part 1, pages 289-308
  119. In Courts, Threats Become Alarming Fact of Life, Deborah Sontag, The New York Times, 20 March 2005
  120. Odd legal saga takes an ugly turn, Richard Goering, EE Times, 02 August 2004
  121. Jury finds Mohsen guilty of perjury, obstruction of justice, Dylan McGrath, EE Times, 28 February 2006
  122. Bailey, Brian (September 6, 2011). "Amr Mohsen – A story so bizarre…" EETimesRetrieved September 5, 2021
  123. Santarini, Michael (February 19, 2003). "Mentor loses patent suit against Cadence" EETimesRetrieved September 5, 2021
  124. Cadence sues Berkeley Design Automation, Dylan McGrath, EE Times, 15 April 2013
  125. Mentor buys Berkeley DA after Cadence lawsuit, Peter Clarke, eeNews Europe, 24 March 2014
  126. Bailey, Brian (December 20, 2017). "Alberto Sangiovanni-Vincentelli receives EDAA Lifetime Achievement Award". EE Times.
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